Published in ISCA, 2025
A low-bit inference accelerator based on lookup tables (LUTs) to enhance LLM performance.
Recommended citation: Zhiwen Mo et al., "LUT Tensor Core", ISCA 2025
Published in OSDI, 2025
A low-bit inference accelerator based on lookup tables (LUTs) to enhance LLM performance.
Recommended citation: Zhiwen Mo et al., "LUT Tensor Core", ISCA 2025
Published in , 1900
| ISCA | LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference Zhiwen Mo, Lei Wang, Jianyu Wei, ... International Symposium on Computer Architecture (ISCA '25) | 2025 |
Published in , 1900